Job Description
Participate in feasibility studies and sub-block/chip-level architecture definitionDesign and integration of digital sub-blocks and chip-level implementationVerification planning and Block/Top level direct testingSupport DFT strategy and implementationWork closely with back-end designers to correctly implement digital designs to layoutBlock/Top level LINT/CDC/RDC/STA/LEC setup and checksLab evaluation and debugging of digital blocks and full chip functionSupport production testing, HW/SW development and device characterizationTape out database and documentation preparationIC design reviews, consultations and risk assessmentsParticipation in project meetings, training courses and conferencesDemonstrates an ability to learn new tool features and procedures
Qualifications
Master’s or Ph.D. in Electrical Engineering or related disciplinesPreferably 4−6 years of experience in design of digital circuitsFull understanding of digital design flow and electrical propertiesKnowledge of HDL simulators, synthesis tools, (System)Verilog/VHDL, scripting languages (TCL, Bash, etc.)Take full responsibility for solutions and meet deadlinesGood written, communication and teamwork skillsIntermediate English level
Will be a plus:
Understanding of IC Design flow, PnR, DFT, etc.Knowledge of transistor-level integrated circuits and semiconductor physicsUnderstanding of advanced verification methodologies (e.g. UVM, ABV)Experience with FPGA and interfaces (UART, I2C, SPI, JTAG, AMBA - AHB/APB/AXI, etc.)Knowledge of Verdi, Spyglass, Xcelium, Prime Time, Design Compiler toolsProgramming/scripting (Perl, MATLAB, Skill, Python, C/C++)
Company Description
Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.